Memory cell circuit with supplemental current

Details Memory cell circuit with supplemental current Memory cell circuit with supplemental current

1988-12-27

1990-05-01

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

365174, G11C 1140, G11C 700

Patent

active

049224115

ABSTRACT:
A memory cell circuit with a pair of load bipolar transistors and a pair of control bipolar transistors, and with a pair of supplemental transistors providing current shunts.

REFERENCES:
patent: 4376985 (1983-03-01), Isogai
patent: 4419745 (1983-12-01), Toyoda et al.
patent: 4754430 (1988-06-01), Hobbs
IBM Technical Disclosure Bulletin, vol. 28, No. 9, Feb. 1986, "Memory Cells With NPN Couplings".

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