Method and system for the determination of performance character

Details Method and system for the determination of performance character Method and system for the determination of performance character

1997-06-13

1999-12-07

Teska, Kevin J.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

39550035, 39550038, 39550042, 39518321, 711118, G06F 1134, G06F 1200, G06F 1700, G06F 1900

Patent

active

059997214

ABSTRACT:
A method and system are disclosed for the determination of performance characteristics of a cache design by simulating cache operations utilizing a cache output trace. A first plurality of references are input into a cache during a specified period. In response to the inputs, the cache generates an output which includes a second plurality of references. The output is stored as a trace. The trace may be modified by specifying at least one of the second plurality of references as a particular type of reference. A quantity of the first plurality of references input into the cache during the specified period is determined. Cache operation is simulated utilizing the trace by inputting the trace into a cache simulator. A result of the simulation is determined. Performance characteristics of the cache design are determined utilizing the result of the simulation and the quantity of the first plurality of references.

REFERENCES:
patent: 5274811 (1993-12-01), Borg et al.
patent: 5452440 (1995-09-01), Salsburg
patent: 5615357 (1997-03-01), Ball
patent: 5619676 (1997-04-01), Fukuda et al.
patent: 5862371 (1999-01-01), Levine et al.
PTO 99-2232 (Translation of Japanese Patent Application No. 07069121, Publication No. 408263372A, Published Oct. 11, 1996, invented by Yamada et al., translated by FLS, Inc., Mar. 1999, pp. 1-18, especially pp. 2-3).
PTO 99-2233 (Translation of Korean Article: "A new trace-driven simulation algorithm for sector cache memories", Journal of the Korean Institute of Telematics and Electronics, vol. 28B, No. 3, Mar. 1, 1991, pp. 17-27, written by Park et al., translated, Apr. 1999.
Dwarkadas et al. ("Efficient Simulation of Cache Memories", Simulation Conference Proceedings, Dec. 4, 1989, pp. 1032-1041).
Agarwal et al. ("An Analytical Cache Model", ACM Transactions on Computer Systems, vol. 7, No. 2, May 1989, pp. 184-215).
Nicol et al. ("Massively Parallel Algorithm for Trace-Driven Cache Simulations", IEEE Transactions on Parallel and Distributed Systems, vol. 5, No. 8, Aug. 1994, pp. 849-859).
Sites et al. ("Multiprocessor Cache Analysis Using ATUM", IEEE, Jan. 1988, pp. 186-195).
Laha et al. ("Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems", IEEE Transactions on Computers, vol. 37, No. 11, Nov. 1988).
Park et al. ("A new trace-driven simulation algorithm for sector cache memories", Journal of the Korean Institute of Telematics and Electronics, vol. 28B, No. 3, Mar. 1, 1991, pp. 17-27).

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