Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-06-11
1999-03-16
Fahmy, Wael
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257413, 257384, H01L 2976, H01L 2994, H01L 31062
Patent
active
058834184
ABSTRACT:
A silicide layer having a two-layer structure or a silicide layer made of material having high etching selectivity is formed on a silicon layer constituting a gate electrode, causing the silicide layer to serve as an etching stopper at the time of forming a contact hole. Furthermore, a top surface of an insulating layer in which a contact hole is formed is planarized by a CMP method, facilitating subsequent formation of an interconnection or the like. In addition, when a silicide layer consisting of two layers is formed on the gate electrode, each of those two layers can be made of either the same material or materials different from each other. Thus, even if contact holes extending to the gate electrode and source/drain regions are simultaneously formed in the planarized insulating layer, lower layers of the gate electrode and the source/drain regions will not be etched, resulting in a semiconductor device in which an interconnection on the insulating layer can be formed easily.
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Chih-Shih Wei et al, Formation of Self-Aligned TiN/CoSi2 Bilayer from Co/Ti/Si and It's applications in Salicide, Diffusion Barrier and Contact Fill, Intel Corporation, VMIC Conference, IEEE, p. 232-239, Jun. 1990.
C.Y. Ting et al, The Use of TISI.sub.2 for Self Aligned Silicide (Salicide) Technology, IBM Thomas J. Watson Research Center, V-MIC Conference, IEEE, pp. 307-318, Jun. 1985.
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Fahmy Wael
Mitsubishi Denki & Kabushiki Kaisha
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