Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-05-01
1999-10-26
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711141, 711118, 711146, G06F 1200
Patent
active
059745096
ABSTRACT:
An efficient method for purging cache memory sub-blocks within a cache memory block is disclosed. The method is particularly applicable to cache memories established on rotating magnetic media, such as a hard disk drive. The method is unique in that it requires absolutely no system overhead when the system is running and the cache is not completely full. When all sub-blocks within the cache memory have been filled, sophisticated, system resource-intensive algorithms are not employed to determine which is the oldest or the least frequently used sub-block of data. Instead, sub-blocks of data are removed in a pseudo-random manner until ample space is available within the cache.
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Kubida William J.
Langley Stuart T.
Sun Microsystems Inc.
Swann Tod R.
Tzeng Fred F.
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