Semiconductor memory device incorporating redundancy memory cell

Static information storage and retrieval – Read/write circuit – Bad bit

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36518901, 36523001, G11C 1300

Patent

active

059739703

ABSTRACT:
A semiconductor memory device includes a plurality of bus lines, normal memory cell arrays, data amplifiers for amplifying data read from the normal memory cell arrays, redundancy memory cell arrays, and redundancy data amplifiers for amplifying data read from the redundancy memory cell arrays. First bus selectors selectively connect the normal data amplifiers to the bus lines and second bus selectors selectively connect the redundancy data amplifiers to the bus lines.

REFERENCES:
patent: 5687125 (1997-11-01), Kikuchi

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