Reading circuit for semiconductor memory cells

Details Reading circuit for semiconductor memory cells Reading circuit for semiconductor memory cells

1998-12-01

1999-10-26

Nelms, David

Static information storage and retrieval

Read/write circuit

365168, 365149, 365207, G11C 1604

Patent

active

059739665

ABSTRACT:
A read circuit for semiconductor memory cells, comprising first and second active elements coupled to a supply line via at least a first switch, wherein the first and second active elements are respectively connected, at first and second circuit nodes, respectively, to a first transistor through which the active elements are coupled to a ground. These first and second circuit nodes are also connected to ground through first and second capacitive elements, respectively, each having a switch connected in parallel to the capacitive element.

REFERENCES:
patent: 5218570 (1993-06-01), Pascucci et al.
patent: 5694363 (1997-12-01), Calligaro et al.
patent: 5710739 (1998-01-01), Calligaro et al.
patent: 5748534 (1998-05-01), Dunlap et al.
patent: 5787042 (1998-07-01), Morgan

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