Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1997-10-22
1999-10-26
Clark, Sheila V.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257700, 257690, H01L 2304
Patent
active
059733977
ABSTRACT:
A semiconductor device and fabrication method are presented which advantageously combine TAB and wire bonding techniques to increase integrated circuit I/O pad density. The semiconductor device includes an integrated circuit, a substrate, and a carrier film (i.e., a TAB tape). The integrated circuit has a set of input/output (I/O) pads arranged upon an upper surface. The substrate has a die cavity within an upper surface and a set of bond traces arranged about the die cavity. An underside surface of the integrated circuit is attached to the substrate within the die cavity. The carrier film is positioned over the upper surface of the substrate such that the upper surface of the integrated circuit is exposed through a die aperture and portions of the members of the set of bond traces are exposed through corresponding members of a set of bond trace apertures. Each conductor has a first end connected to a member of the set of bond traces and an opposed second end connected to a corresponding member of a portion of the set of I/O pads. Each of the remaining members of the I/O pads are connected to respective bond traces adjacent to the die cavity by bonding wires. By combining TAB and wire bonding techniques, the number of I/O pads per unit of upper surface area of the integrated circuit may be increased.
REFERENCES:
patent: 5212405 (1993-05-01), Oigawa et al.
Chia Chok J.
Lim Seng-Sooi
Low Qwai H.
Clark Sheila V.
LSI Logic Corporation
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