Method and apparatus for pipelined encoding

Details Method and apparatus for pipelined encoding Method and apparatus for pipelined encoding

1998-01-15

1999-09-21

Chung, Phung M.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

714819, G06F 1110, H03M 1312

Patent

active

059548363

ABSTRACT:
A convolutional encoding apparatus and method for encoding input data with bits stored in a shift register. A predetermined set of coefficient values is provided to define a coefficient mask value. It is then determined whether the bit of the input data is one of a logical zero and a logical one. Only if the bit of the input data is a logical one, the coefficient mask value and the shift register value are combined to produce a next shift register value. Predetermined ones of the bits of the next shift register value are then selected as coded output data.

REFERENCES:
patent: 5535239 (1996-07-01), Padovani et al.
patent: 5629955 (1997-05-01), McDonough
patent: 5659569 (1997-08-01), Padovani et al.
Wicker, Error Control Systems for Digital Communication and Storage; p. 264; (Prentice Hall, 1995).
Proakis, Digital Communications; Ch. 5.3 (Mc-Graw Hill, 1989) 2d.ed.

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