Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-04-11
1999-09-21
Le, Dieu-Minh T.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 56, 714 34, 714798, G06F 1100
Patent
active
059548258
ABSTRACT:
A shift register is used to latch the bus-driver-enable signal for each potential bus driver during each system clock cycle. The shift register clock will freeze upon receipt of a "check stop" signal. Once frozen, the shift register can be scanned for fault isolation analysis.
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Kaiser John Michael
Maule Warren Edward
International Business Machines - Corporation
Le Dieu-Minh T.
Schultz George R.
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