CMOS Differential comparator with hysteresis

Details CMOS Differential comparator with hysteresis CMOS Differential comparator with hysteresis

1981-05-27

1983-07-19

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307359, 307362, H03K 524

Patent

active

043945872

ABSTRACT:
A hysteresis circuit is added to a differential comparator to provide a predetermined bias current from one of two input transistors connected in a differential configuration. A current mirror structure is used to accurately determine the amount of current which is shunted when the output of the comparator is in a predetermined state.

REFERENCES:
patent: 4069431 (1978-01-01), Kucharewski
patent: 4110641 (1978-08-01), Payne
E. R. Hnatek, Applications of Linear Integrated Circuits, John Wiley and Sons, 1975, pp. 251-255 and 278-279.

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