Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1993-02-25
1995-01-17
Hudspeth, David R.
Electronic digital logic circuitry
Interface
Logic level shifting
326 21, H03K 190175, H03K 19003
Patent
active
053828470
ABSTRACT:
Disclosed is an output buffer circuit for allowing a reduction in overshoot and undershoot without a decrease in output speed of an output signal. This output buffer circuit includes a PMOS transistor and an NMOS transistor complementarily connected to each other, an impedance increasing circuit connected in parallel to PMOS transistor, and an impedance increasing circuit connected in parallel to NMOS transistor. Impedance increasing circuit increases output impedance in accordance with an increase in voltage on an output node of a CMOS circuit. Impedance increasing circuit increases output impedance in accordance with a decrease in voltage on output node of the CMOS circuit.
REFERENCES:
patent: 4408135 (1983-10-01), Yuyama et al.
patent: 4680487 (1987-07-01), Kobayashi
patent: 4758743 (1988-07-01), Dehganpour et al.
patent: 4785203 (1988-11-01), Nakamura
patent: 4825101 (1989-04-01), Walters, Jr.
patent: 4829199 (1989-05-01), Prater
patent: 4855623 (1989-08-01), Flaherty
patent: 4961010 (1990-10-01), Davis
patent: 5003205 (1991-03-01), Kohda et al.
patent: 5036222 (1991-07-01), Davis
patent: 5081374 (1992-01-01), Davis
patent: 5192879 (1993-03-01), Aoki et al.
Hudspeth David R.
Mitsubishi Denki & Kabushiki Kaisha
Roseen Richard
LandOfFree
Output buffer circuits including voltage compensation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Output buffer circuits including voltage compensation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Output buffer circuits including voltage compensation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-748998