Buffer with fast edge propagation

Electronic digital logic circuitry – Interface – Current driving

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Details

326 17, 326 86, H03K 190175, H03K 19094

Patent

active

060407131

ABSTRACT:
A buffer having first and second input terminals and an output terminal. The buffer also includes a fast edge driver having an input terminal and an output terminal, with the input terminal connected to the first input terminal of the buffer, and the output terminal connected to the output terminal of the buffer. A shielding circuit is provided having an input terminal and an output terminal, with the input terminal connected to the second input terminal of the buffer. The buffer further includes a recovery circuit having an input terminal and an output terminal, with the input terminal connected to the output terminal of the shielding circuit, and the output terminal connected to the output terminal of the buffer.

REFERENCES:
patent: 4647797 (1987-03-01), Sanwo et al.
patent: 5055713 (1991-10-01), Watanabe et al.
patent: 5410262 (1995-04-01), Kang
patent: 5489858 (1996-02-01), Pierce et al.
patent: 5612630 (1997-03-01), Wright et al.
patent: 5612637 (1997-03-01), Shay et al.
patent: 5701090 (1997-12-01), Hidaka et al.

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