Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-04-06
2000-03-21
Booth, Richard
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438426, 438435, 438453, 438701, 438702, H01L 2176, H01L 21311
Patent
active
060402318
ABSTRACT:
A method of forming a shallow trench isolation structure is disclosed. The method comprises providing a substrate; forming a first oxide layer, a stop layer and a second oxide layer successively on the substrate; patterning the second oxide layer, the stop layer and the first oxide layer and a portion of the substrate to form a trench wherein the trench has a top corner. Then, a recess is formed at the periphery of the pad oxide layer, using the salicide process to form an aslope periphery at the top corner. Consequently, kink effect is improved, leakage current is reduced and the performance of the device is enhanced.
REFERENCES:
patent: 5578518 (1996-11-01), Koike et al.
patent: 5910018 (1999-06-01), Jang
Booth Richard
Pompey Ron
United Microelectronics Corp.
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