EPROM Cell with reduced programming voltage and method of fabric

Details EPROM Cell with reduced programming voltage and method of fabric EPROM Cell with reduced programming voltage and method of fabric

1980-10-14

1983-10-25

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

365218, 365104, G11C 1140

Patent

active

044123108

ABSTRACT:
An improved floating gate MOS EPROM cell which is programmable at a lower potential (12 volts) than prior art devices which often require 25 volts. The oxide thickness between the floating gate and overlying control gate is thicker at the edges of the floating gate than in the central portion. The thicker oxide at the edges prevents uncontrolled DC erasing. This allows a thinner oxide to be used in the central portion and provides the increased capacitance coupling needed for programming at a lower potential.

REFERENCES:
patent: 4004159 (1977-01-01), Rai et al.
patent: 4016588 (1977-04-01), Ohya et al.
patent: 4371955 (1983-02-01), Sasaki

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