Semiconductor integrated circuit and wiring method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438637, H01L 2144

Patent

active

059603097

ABSTRACT:
A method wires devices formed on a semiconductor integrated circuit. The method includes the steps of finding a wiring path between the devices, determining whether or not a delay in transmitting signals through the wiring path is within a predetermined range, and if the delay is out of the constraint, changing the number, or area, or both of them of through-holes of a given via in the wiring path so that the delay meets in the timing constraints. The integrated circuit thus wired is capable of handling signals that require severe delay specifications.

REFERENCES:
patent: 4638458 (1987-01-01), Itoh
patent: 5119170 (1992-06-01), Iwamatsu
patent: 5631478 (1997-05-01), Okumura
patent: 5883433 (1999-03-01), Oda

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