Method to improve uniformity/planarity on the edge die and also

Details Method to improve uniformity/planarity on the edge die and also Method to improve uniformity/planarity on the edge die and also

1996-12-23

1999-09-28

Quach, T. N.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438629, 438633, 438669, H01L 2128, H01L 21302

Patent

active

059603054

ABSTRACT:
A process of making an IC wafer including a surface with improved uniformity, planarity and a reduced likelihood of creating stringers is disclosed. The process includes: depositing a layer of polysilicon or metallization on the surface having a die region including a plurality of die that are disposed interior to a perimeter of the surface and a peripheral region disposed outside the die region and abutting the die region of the surface; depositing a layer of photoresist on the layer of metallization; exposing the layer of photoresist to radiation to define a mask on an area in the die region and designated to form the plurality of die; exposing at least a portion of the layer of photoresist to radiation to define the mask in the peripheral region of the wafer surface; and etching the layer of metallization underlying unmasked portions of the photoresist in the peripheral region along with the die region of the surface to limit material build-up on the peripheral region and form metal contact regions underlying the masked portions.

REFERENCES:
patent: 4816895 (1989-03-01), Kikkawa
patent: 5328553 (1994-07-01), Poon
patent: 5366911 (1994-11-01), Lur et al.
patent: 5453583 (1995-09-01), Rostoker et al.
patent: 5459340 (1995-10-01), Anderson et al.
patent: 5530294 (1996-06-01), Kim
patent: 5607877 (1997-03-01), Matsuda et al.
patent: 5726099 (1998-03-01), Jaso

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