Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1995-06-05
1997-09-09
Quach, T. N.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
148DIG13, 438430, 438666, H01L 21283, H01L 2131
Patent
active
056656343
ABSTRACT:
In a semiconductor island structure with passive side isolation, a method and structure for reducing corner breakdown where a device conductor crosses the edge of the island. The decrease in the field strength at the island edge between the conductor and the adjacent conducting region may be achieved by increasing the depth of the insulator beneath the conductor where it crosses the island edge without the necessity for increasing the thickness of the layer of insulation applied directly to the surface of the island by the use of a second or higher level interconnect, e.g., the conventional deposition of one or more additional layers of insulation over the device terminal to increase the spacing between the conductor and the surface of the island. In this way the process by which the device is constructed may remain unchanged. The decrease in the field strength at the island edge may alternatively or in addition be achieved by increasing the thickness of the insulator providing lateral isolation without increasing the thickness of the substrate isolation by the use of lateral trench isolation formed independently of the substrate isolation.
REFERENCES:
patent: 3405329 (1968-10-01), Loro et al.
patent: 4941026 (1990-07-01), Temple
patent: 5321291 (1994-06-01), Redwine
Harris Corporation
Quach T. N.
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