Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Patent
1995-06-06
1997-09-09
Niebling, John
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
257200, 257197, 438606, 438944, H01L 21265
Patent
active
056656149
ABSTRACT:
A submicron emitter heterojunction bipolar transistor and a method for fabricating the same is disclosed. The fabrication process includes lattice matched growth of subcollector, collector, base, emitter, and emitter cap layers in sequential order on a semi-insulating semiconductor substrate. An emitter cap mesa, an emitter/base/collector mesa and a subcollector mesa are formed. Dielectric platforms are formed extending the base/collector layers laterally. Sidewalls are formed on the sides of emitter cap mesa and the sides of the extended base/collector layers and undercuts are etched into the emitter layer and the upper portion of the subcollector layer. This forms an overhang on the emitter cap mesa with respect to the emitter layer and an overhang on the base/collector layers with respect to the upper portion of the subcollector layer. Emitter, base and collector contacts are simultaneously formed, the base contact aligned to the edge of the emitter cap overhang and the collector contact aligned to the edge of the base/collector layer overhang.
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Hafizi Madjid
Stanchina William E.
Denson-Low Wanda K.
Duraiswamy Vijayalakshmi
Hughes Electronics
Niebling John
Pham Long
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