Static random access memory

Static information storage and retrieval – Systems using particular element – Flip-flop

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365156, G11C 1134

Patent

active

056005890

ABSTRACT:
A stable action of a memory cell in low voltage operation is realized, while assuring the reliability of the memory cell fined in structure for enhancing the degree of integration. An external supply voltage (V.sub.cc) is stepped down by a step-down transistor (Q1), and the stepped-down voltage is obtained as a potential for a bit line BIT. The external supply voltage (V.sub.cc) is also stepped down by a step-down transistor (Q5), and the stepped-down voltage is obtained as a potential for a bit line BIT. Furthermore, the external supply voltage (V.sub.cc) is stepped down by a step-down transistor (Q3), and the stepped-down voltage is obtained as an internal supply voltage for a memory cell (MC). On the contrary, to gate electrodes of both access transistors A1, A2, the external supply voltage V.sub.cc is directly applied through word drivers 1, 2, respectively.

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patent: 5410506 (1995-04-01), Ferrant et al.
1992 IEEE International Solid-State Circuits Conference, pp. 206-207 and 146-148, Feb. 21, 1992, K. Ishibashi, et al., "A 1V TFT-Load SRAM Using A Two-Step Word-Voltage Method".

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