Memory control device and address generating circuit

Electrical computers and digital processing systems: memory – Storage accessing and control

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711200, G06F 1202

Patent

active

058976523

ABSTRACT:
A memory control device having a memory for reading out and holding managing data from a recording medium is equipped with a memory controller for outputting write-in/read-out addresses through an address generating circuit and receiving write-in/read-out data, and a system controller for controlling the memory controller to execute the data write-in/read-out operation on the memory. When link data in the managing information is supplied from the system controller or obtained from the data read in from the memory, an address to be next accessed on the basis of the link data is calculated and the calculated address is output to the memory.

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