Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-06-26
1999-04-27
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438649, 438682, H01L 213205, H01L 214763, H01L 2144
Patent
active
058973656
ABSTRACT:
Upon completion of a sputtering for a titanium layer, the titanium layer is taken out from the sputtering system, and a surface portion of the titanium layer is oxidized in the atmosphere; the titanium oxide layer is evaporated in fluoride gas atmosphere so as to prevent the titanium layer from the oxygen, and aggregation hardly takes place during silicidation of the titanium layer so that the titanium silicide layer is decreased in resistivity.
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patent: 5510292 (1996-04-01), Hayashi
patent: 5721175 (1998-02-01), Kunishima et al.
patent: 5744395 (1998-04-01), Shue et al.
patent: 5792684 (1998-08-01), Lee et al.
by Y. Matsubura et al., "TiN-capped TiSi.sub.2 formation in W/TiSi.sub.2 process for a quater-micron complementary metal-oxide-semiconductor" Thin Solid Films 253, 1994, pp. 395 to 401, Month Unknown.
Lattin Christopher
NEC Corporation
Niebling John F.
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