Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Patent
1998-05-01
2000-08-01
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
709230, 709236, 709245, 710 5, 710 38, 710 53, 370235, 370453, 370462, G06F 1300
Patent
active
060981253
ABSTRACT:
A method and apparatus for processing and transferring frames of data in a computer data link that maps incoming frames to a specific buffer ring in host memory based on routing control and type fields in each frame. More particularly, a Fibre Channel link port contains receiver routing code (RRCode) registers that allow host software to set up routing control (R.sub.-- CTL) match and mask fields, and TYPE match and mask fields. The link port uses these registers to match and mask against corresponding R.sub.-- CTL/TYPE fields in a received frame to determine which of several R.sub.-- CTL/TYPE host memory buffer rings should be used to store the received frame. The link port places a code (RRCode) in a start of frame (SOF) status word associated with a frame. The RRCode indicates a specific R.sub.-- CTL/TYPE host memory buffer ring, or indicates that no match was found or that multiple matches were found. A protocol engine reads the RRCode field in the SOF status word of the received frame, and queues a direct memory access (DMA) operation to an appropriate R.sub.-- CTL/TYPE buffer ring. The host may then process the contents of the indicated buffer ring. Since the buffer rings are "pre-sorted" as to frame type, the host may more efficiently respond to incoming frames.
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Fibre Channel Overview, http://www.cern.ch/HSI/fcs/spec/overview.htm.
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Fiacco Peter
Henson Karl M.
Roach Bradley
California Institute of Technology
Lee Thomas C.
Peyton Tammara
LandOfFree
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