High speed empty flag generator

Static information storage and retrieval – Read/write circuit – Serial read/write

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Details

36518907, G11C 700

Patent

active

06097656&

ABSTRACT:
The present invention relates to a high speed empty flag generator and a method of generating a high speed empty flag which are achieved by generating a pre-empty flag in a clock ahead of a read address which is identical to a write address and by generating an empty flag as soon as a read address identical to the write address is generated after an elapse of one clock. The present invention includes a subtracter generating upper N-1 bits of a value resulted from subtracting 1 from a write address of N bits, a pre-empty flag generator generating an pre-empty flag when an output of upper N-1 bits of a rear address of N bits and an output of N-1 bits of the subtracter coincide by comparison, and a main empty flag receiving said pre-empty flag wherein the main empty flag generator generating an empty flag at a generating point of a first read signal after the pre-empty flag.

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patent: 5956748 (1999-09-01), New

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