Static information storage and retrieval – Read/write circuit – Erase
Patent
1981-11-13
1985-07-23
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Erase
365185, G11C 1140
Patent
active
045312036
ABSTRACT:
An erase gate is formed for erasing data from a floating gate in a semiconductor memory device having the floating gate and a control gate.
Furthermore, in order to achieve electrical insulation between the erase gate and the control gate, an insulating film formed between the erase gate and the control gate is made thicker than an insulating film formed between the floating gate and the erase gate.
REFERENCES:
patent: 4203158 (1980-05-01), Frohman-Bentchkowsky et al.
1980 IEEE International Solid-State Circuit Conference 152, (Feb. 1980), A 16 Kb Electrically Erasable Nonvolatile Memory.
Kupec et al., Triple Level Poly-Silicon E.sup.2 Prom with Single Transistor Per Bit, 1980, IEEE.
Iizuka Hisakazu
Masuoka Fujio
Fears Terrell W.
Tokyo Shibaura Denki Kabushiki Kaisha
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