Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1998-09-29
2000-08-22
Wilczewski, Mary
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438622, 438652, 438688, H01L 2128
Patent
active
06107182&
ABSTRACT:
A semiconductor device having a contact structure that can exhibit superlative step coverage without causing voids or wiring discontinuities, using aluminum or aluminum alloys as a conductive substance for via-holes. A method of fabricating the semiconductor device comprises, for at least one layer of wiring regions above the first wiring region on a semiconductor substrate, the following steps (a) to (f): (a) a step of forming a via-hole in a second interlayer dielectric formed above the first wiring region on a semiconductor substrate; (b) a degassing step for removing gaseous components included within the interlayer dielectric by a heat treatment under reduced pressure and at the substrate temperature of 300.degree. C. to 550.degree. C.; (c) a step of forming a wetting layer on the surface of the interlayer dielectric and the via-hole; (d) a step of cooling the substrate to a temperature of no more than 100.degree. C.; (e) a step of forming a first aluminum layer comprising one of aluminum and an alloy in which aluminum is the main component on the wetting layer at a temperature of no more than 200.degree. C.; and (f) a step of forming a second aluminum layer comprising one of aluminum and an alloy in which aluminum is the main component on the first aluminum layer at a temperature of at least 300.degree. C.
REFERENCES:
patent: 5012309 (1991-04-01), Nakayama
patent: 5471418 (1995-11-01), Tanigawa
patent: 5696017 (1997-12-01), Ueno
patent: 5858837 (1999-01-01), Sakoh et al.
Asahina Michio
Matsumoto Kazuki
Moriya Naohiro
Takeuchi Jun-ichi
Park James
Seiko Epson Corporation
Wilczewski Mary
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