Nonvolatile semiconductor memory device having row decoder

Details Nonvolatile semiconductor memory device having row decoder Nonvolatile semiconductor memory device having row decoder

1998-01-13

2000-07-11

Le, Vu A.

Static information storage and retrieval

Floating gate

Particular biasing

36518909, 36518519, G11C 700

Patent

active

060882670

ABSTRACT:
A nonvolatile semiconductor memory device is provided in which a negative voltage is applied to a gate electrode of a memory cell transistor during an erase mode. The memory device includes a row decoder circuit having an N-channel transistor connected to a word line. The N-channel transistor is provided on a P-type well region of a semiconductor substrate. A negative voltage is applied to the P-type well region during the erase mode, while ground potential is applied thereto during other modes.

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