Semiconductor device having electrically coupled transistors wit

Details Semiconductor device having electrically coupled transistors wit Semiconductor device having electrically coupled transistors wit

1995-06-02

1997-04-01

Tran, Minh-Loan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257413, 257655, 257903, 257904, H01L 2976, H01L 2711

Patent

active

056169485

ABSTRACT:
A semiconductor device includes a pass transistor (28) electrically coupled to a driver transistor (16) by a common drain region (52). The pass transistor (28) includes the pass gate electrode (44) having a polycrystalline silicon layer (68). The driver transistor (16) includes a driver gate electrode (40) having a polycrystalline silicon layer (74). The dopant concentration in polycrystalline silicon layer (74) is greater than the dopant concentration in polycrystalline silicon layer (68). The differential and dopant concentration between the pass gate electrode (44) and the driver gate electrode (40) results in a greater current gain in the driver transistor (16) relative to the pass transistor (28). When incorporated into an SRAM memory cell (10), the driver transistor (16) and the pass transistor (28) provide greater cell stability by improving the immunity of the cell to electrical disturbance through the pass transistor (28).

REFERENCES:
patent: 5371026 (1994-12-01), Hayden et al.
patent: 5373170 (1994-12-01), Pfiester et al.
Shuji Ikeda et al., "A Stacked Split Word-Line (SSW) cell for low voltage operation, large capacity, high speed SRAMs", 1993, IEEE, pp. 33.1.1-33.1.4.
C.Y. Wong et al., "Doping Of N+ and P+ Polysilicon In A Dulal-Gate CMOS Process", 1988, IEEE, pp. 238-241.
Rafael Rios et al., "Determination of Ultra-Thin Gate Oxide Thicknesses for CMOS Structures Using Quantum Effects", 1994, IEEE, pp. 25.6.1-25.6.4.

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