Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1996-10-09
1998-05-05
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
H01L 2100
Patent
active
057473676
ABSTRACT:
A process is provided for producing active and passive devices on various levels of a semiconductor topography. As such, the present process can achieve device formation in three dimensions to enhance the overall density at which an integrated circuit is formed. The multi-level fabrication process not only adds to the overall circuit density but does so with emphasis placed on interconnection between devices on separate levels. Thus, high performance interconnect is introduced whereby the interconnect is made as short as possible between features within one transistor level to features within another transistor level. The interconnect employs a via routed directly between a junction of an upper level transistor to a junction of a lower level transistor so as to effect direct coupling between series or parallel-coupled transistor pairs. Direct coupling in this fashion affords lower parasitic resistance and thereby achieves the benefit of a higher performance, faster switching circuit.
REFERENCES:
patent: 4902637 (1990-02-01), Kondou
Gardner Mark I.
Kadosh Daniel
Advanced Micro Devices , Inc.
Daffer Kevin L.
Mee Brendan
Niebling John
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