Memory control device

Details Memory control device Memory control device

1992-12-08

1994-07-19

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Serial read/write

365 78, 36518912, 365239, 365240, G11C 700

Patent

active

053315987

ABSTRACT:
A memory control device for controlling writing and reading data in and from a line memory made up of a plurality of FIFO memories. Writing clocks are circularly applied to the plurality of FIFO memories of the line memory. Also, reading clocks are circularly applied to the plurality of FIFO memories. Thus, although data written in the FIFO memories are discrete, data circularly read from the plurality of FIFO memories are sequential in such order as they are written in the line memory.

REFERENCES:
patent: 4037203 (1977-07-01), Stalley
patent: 4839866 (1989-06-01), Ward et al.
patent: 5157633 (1992-10-01), Aoki
patent: 5198999 (1993-03-01), Abe et al.
patent: 5200925 (1993-04-01), Morooka
Patent Abstracts of Japan, vol. 6, No. 112, Jun. 23, 1982 & JP-A-57 040 800.

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