Method of making a silicide semiconductor device with junction b

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant

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438564, 438586, 438596, 438597, 438639, 438642, H01L 2122

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060279915

ABSTRACT:
A method of making a semiconductor device includes a semiconductor substrate, an impurity doped region formed in the semiconductor substrate, an insulating layer formed on the semiconductor substrate having an opening leading to the impurity doped region, a polycrystalline silicon layer formed on the insulating layer and the impurity doped region, and a metal silicide layer formed on the polycrystalline silicon layer. A transverse thickness of the polycrystalline silicon layer at a sidewall of the insulating layer is larger than a longitudinal thickness of the polycrystalline silicon layer at a bottom of the opening and at a surface of the insulating layer.

REFERENCES:
patent: 4507171 (1985-03-01), Bhatia et al.
patent: 4583106 (1986-04-01), Anantha et al.
patent: 4691435 (1987-09-01), Anantha et al.
patent: 4975381 (1990-12-01), Taka et al.
patent: 4994400 (1991-02-01), Yamaguchi et al.
patent: 5026663 (1991-06-01), Zdebel et al.
patent: 5137840 (1992-08-01), Desilets et al.
patent: 5147809 (1992-09-01), Won et al.
patent: 5213989 (1993-05-01), Fitch et al.
patent: 5670417 (1997-09-01), Lambson et al.
T. Nakamura et al., "Ultra High Speed Bipolar Device-SICOS", 18th International Conference on Solid State Devices and Materials pp. 279-282 (1986).
C. Chang, "Formation of PtSi in the presence of W and Al", J. Appl. Physics 63(1): 236-238 (1988).
Y. Okita et al., "A Novel Base-emitter Self-alignment Process for High Speed Bipolar LSIS", Proc. of the IEEE 1988 Custom Integrated Circuits Conference pp. 22.4.1-22.4.4 (1988).
P. Zdebel et al., "MOSAIC III--A High Performance Bioplar Technology with Advanced Self-aligned Devices", Proc. of the 1987 Bipolar Circuits and Technology Meeting pp. 172-175 (1987).
H. Miyanaga et al., "A 0.85 ns 1Kb Bipolar ECL RAM", 16th Conference on Solid State Devices and Materials, pp. 225-228 (1984).

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