Static information storage and retrieval – Floating gate – Particular biasing
Patent
1998-06-19
1999-12-21
Yoo, Do Hyun
Static information storage and retrieval
Floating gate
Particular biasing
36518514, 36518518, 36518526, 365218, G11C 1602
Patent
active
060058099
ABSTRACT:
A method to program data to and erase data from a split gate flash EEPROM to improve programming and erasing speed, and to improve endurance is disclosed. The programming the split gate flash EEPROM cell is accomplished by simultaneously applying a first positive voltage to the control gate, applying a first moderately negative voltage to the semiconductor substrate, applying a slight potential to the drain region to supply a constant programming current, and applying a second positive voltage to the drain region. The first positive voltage, the first moderately negative voltage, the slight positive potential and the second positive voltage are applied for a sufficient time to cause electrons to be trapped on the floating gate. The erasing of the split gate flash EEPROM cell is accomplished by simultaneously applying a large positive voltage to the control gate, applying the first moderately negative voltage to the semiconductor substrate, applying a second moderately negative voltage to the source region, and applying the ground reference potential or floating the drain region. The large positive voltage, the first moderately negative voltage, and the second moderately negative voltage is applied for a sufficient time period to institute Fowler-Nordheim tunneling from the floating gate to the control gate to eliminate any electrons from the floating gate.
REFERENCES:
patent: 4894802 (1990-01-01), Hsia et al.
patent: 5033023 (1991-07-01), Hsia et al.
patent: 5067108 (1991-11-01), Jeng
patent: 5222040 (1993-06-01), Challa
patent: 5231602 (1993-07-01), Radjy et al.
patent: 5258949 (1993-11-01), Chang et al.
patent: 5349220 (1994-09-01), Hong
patent: 5357476 (1994-10-01), Kuo et al.
patent: 5412608 (1995-05-01), Oyama
patent: 5416738 (1995-05-01), Shrivastava
patent: 5481494 (1996-01-01), Tang et al.
patent: 5485423 (1996-01-01), Tang et al.
patent: 5521866 (1996-05-01), Akaogi
patent: 5596528 (1997-01-01), Kaya et al.
patent: 5726933 (1998-03-01), Lee et al.
patent: 5883832 (1999-03-01), Tempel et al.
Hsieh Chia-Ta
Kuo Di-Son
Lin Yai-Fen
Sung Hung-Cheng
Ackerman Stephen B.
Knowles Billy J.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
Yoo Do Hyun
LandOfFree
Program and erase method for a split gate flash EEPROM does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Program and erase method for a split gate flash EEPROM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Program and erase method for a split gate flash EEPROM will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-511779