Digital phase comparator and phase-locked loop

Details Digital phase comparator and phase-locked loop Digital phase comparator and phase-locked loop

1993-08-31

1995-07-11

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375376, 327 12, 327159, H04L 700

Patent

active

054328268

ABSTRACT:
A digital phase comparator measures the phase difference of two signals (S1, S3) from a third signal (S2), and calculates the difference. The zero crossing of the two signals respectively sets two flip-flops (11, 12). If both flip-flops are set, they are simultaneously reset with a delay. Each set flip-flop enables a corresponding counter (13, 14). An evaluation unit averages the counter outputs at major intervals. The phase comparator can be incorporated into a phase-locked loop.

REFERENCES:
patent: 3989931 (1976-11-01), Phillips
patent: 4743857 (1988-05-01), Childers
patent: 4829545 (1989-05-01), Guzik et al.
patent: 4837781 (1989-06-01), Hickling
patent: 4984255 (1991-01-01), Davis et al.
patent: 5087828 (1992-01-01), Sato et al.
Patent Abstracts of Japan, vol. 4, No. 148 (E-030) 18 Oct. 1980 & JP-A-55 100 739 (Mitubishi Electric Corp) Jul. 1980.
Proceedings of the IEEE, Bd. 72, Nr. 3, Mar. 1984, New York US Seiten 397-398, T. S. Rathore et al. "An Accurate Digital Phase Measurement Scheme".
"Semiconductor Circuit Technology", 8th Issue, Springer Publishers 1986, p. 247.

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