Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent
1997-12-16
2000-10-17
Lintz, Paul R.
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
716 7, G06F 1750
Patent
active
061347027
ABSTRACT:
A process for designing an integrated circuit chip includes specifying a set of cells, a set of wiring nets for interconnecting the cells, and a set of regions on the chip in which the cells are to be placed. An assignment of the cells of the set to the regions is generated, and the set of cells is randomly divided into a first subset of cells which remain in the assignment, and a second subset of cells which are removed from the assignment. Penalties are computed for assigning the cells of the second subset to the regions respectively, and the cells of the second subset are assigned to the regions such that a total penalty thereof is minimized. The process is repeated iteratively with the size of the second subset being progressively reduced relative to the size of the first subset until an end criterion is reached.
REFERENCES:
patent: 5699265 (1997-12-01), Scepanovic et al.
Aleshin Stanislav V.
Andreev Alexander E.
Koford James S.
Kudryavtsev Valeriy B.
Podkolzin Alexander S.
Garbowski Leigh Marie
Lintz Paul R.
LSI Logic Corporation
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