Redefinable signal processing subsystem

Details Redefinable signal processing subsystem Redefinable signal processing subsystem

1998-04-15

2000-10-17

Shin, Christopher B.

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral configuration

710 72, 714 7, G06F 1300

Patent

active

061346055

ABSTRACT:
A system in accordance with the invention allows a signal processing system to be configured to perform almost any signal processing function. Such a system includes a redefinable signal processing subsystem and a function-specific module. The system can be defined to perform a particular function by attaching a function-specific module to the redefinable subsystem and downloading function-defining code into the subsystem. The redefinable subsystem includes at least a DSP, a local memory interface, a host interface, and a function module interface. The function-specific module includes at least a subsystem interface, an identifier storage unit, a signal format converter, and a communication adapter. In operation, after a function-specific module is coupled to the subsystem, the subsystem receives a function identifier from the identifier storage unit on the module. The subsystem then requests and receives function-defining code from a host. The function-defining code is maintained in an auxiliary memory and portions thereof are periodically distributed to a local memory, coupled to the subsystem via the local memory interface, at which time the code modules are available for execution by the DSP. When engaged in communications, the module receives data from the DSP through a high speed digital serial channel. The module converts the data format with its signal format converter and then passes the converted data to the communication adapter. The communication adapter conditions the data for conveyance to an external communication signal delivery media.

REFERENCES:
patent: 4718080 (1988-01-01), Serrano et al.
patent: 4775931 (1988-10-01), Dickie et al.
patent: 4991085 (1991-02-01), Pleva et al.
patent: 5127041 (1992-06-01), O'Sullivan
patent: 5134648 (1992-07-01), Hochfield et al.
patent: 5167021 (1992-11-01), Needham
patent: 5181858 (1993-01-01), Matz et al.
patent: 5249218 (1993-09-01), Sainton
patent: 5302947 (1994-04-01), Fuller et al.
patent: 5333177 (1994-07-01), Braitberg et al.
patent: 5357625 (1994-10-01), Arends
patent: 5428671 (1995-06-01), Dykes et al.
patent: 5430793 (1995-07-01), Ueltzen et al.
patent: 5434981 (1995-07-01), Lenihan et al.
patent: 5537601 (1996-07-01), Kimura et al.
patent: 5600845 (1997-02-01), Gilson
patent: 5649001 (1997-07-01), Thomas et al.
patent: 5655069 (1997-08-01), Ogawara et al.
patent: 5664198 (1997-09-01), Chou et al.
patent: 5812856 (1998-09-01), Halahmi
patent: 5857109 (1999-01-01), Taylor
patent: 5887165 (1999-03-01), Mantel
patent: 5915083 (1999-06-01), Ponte
patent: 5978862 (1999-11-01), Kou
Competitive Analysis: Analog Devices, Inc.; ADSP-2104 vs. Texas Instruments TMS320C203 [ADSP-2104]; 1996 Analog Devices, Inc.

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