Static semiconductor memory cell using data lines for voltage su

Details Static semiconductor memory cell using data lines for voltage su Static semiconductor memory cell using data lines for voltage su

1978-07-19

1980-04-15

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

307279, 357 41, 357 45, G11C 1140

Patent

active

041986954

ABSTRACT:
A semiconductor memory circuit includes two cross coupled driver transistors with storage nodes connected to data lines by coupling transistors, providing a static RAM cell. Load resistors are connected from the storage nodes to the data lines rather than to a voltage supply, and the data lines are maintained at an intermediate voltage level in standby operation. The intermediate voltage is sufficient to hold the driver transistors in a stable state, one conducting and one off.

REFERENCES:
patent: 3292008 (1966-12-01), Rapp
patent: 3530443 (1970-09-01), Crafts et al.
patent: 3949383 (1976-04-01), Askin et al.
Gaensslen et al., FET Memory Cell, IBM Technical Disclosure Bulletin, vol. 13, No. 7, p. 1751, 12/70.

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