Method of making a MIS transistor

Details Method of making a MIS transistor Method of making a MIS transistor

1997-06-10

1999-08-24

Bowers, Charles

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

Amorphous semiconductor

438264, 438265, H01L 2176

Patent

active

059435925

ABSTRACT:
A making method of a semiconductor device comprising the step of forming a first silicon layer on a silicon substrate, forming a second silicon layer comprising amorphous silicon on the first silicon layer, then crystallizing the second silicon layer and further forming a conductive layer made of a metal silicide or a metal on the second silicon layer, wherein the method comprises forming an intermediate layer to the surface of the first silicon layer after forming the first silicon layer and before forming the second silicon layer, in which the interlayer film has a film thickness within such a range as electrons are conducted by direct tunneling and such a film thickness as disconnecting the succession of the crystallinity of the first silicon layer upon crystallization of the second silicon layer. Accordingly, fluctuation of Vth caused by inter-diffusion of impurities by way of the metal silicide layer is reduced in CMOS of the dual layered polysilicon polycide structure is decreased.

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patent: 5597741 (1997-01-01), Sakamoto et al.
patent: 5814543 (1998-09-01), Nishimoto et al.
S. M. Sze, VLSI Technology, second edition, p. 98, 1988.

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