Computation circuit using residual arithmetic

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G06F 738

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049492942

ABSTRACT:
A computing circuit using residual arithmetic, particularly on complex numbers. The computation circuit uses residual notation. In residual notation, the computations can be done independently on each digit. It is therefore advantageous to perform the computations simultaneously on all the digits. Advantageously, the arithmetic is built on a unitary commutative ring for which the number 1 is not a quadratic residue. In this case, it is possible to perform a complex multiplication by adding two indices. The embodiment of the invention takes the form of a computer, electronic card or integrated circuit.

REFERENCES:
patent: 4281391 (1981-07-01), Huang
patent: 4506340 (1985-03-01), Circello et al.
patent: 4532638 (1985-07-01), Lagger et al.
1986 IEEE International Symposium on Circuits and Systems, San Jose, CA, May 5-7, 1986, vol. 1 of 3, pp. 117-120, IEEE, New York; M. A. Bayoumi, "Wafer Scale Integration for Generic RNS Structures".
Nineteenth Asilomar Conference on Circuits, Systems & Computers, Nov. 6-8, 1985, Pacific Grove, CA, pp. 48-52, IEEE Computer Society Press, New York; M. A. Bayoumi, "Implementation of RNS Multiplication in VLSI".

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