Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Patent
1999-08-02
2000-10-17
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
438 14, 438 18, 438462, 257 48, H01L 2166
Patent
active
06133054&
ABSTRACT:
A method and an associated article of manufacture in which a conductive layer is formed over an uppermost level of interconnect on a semiconductor substrate. The conductive layer is then patterned to form conductive members. At least one of the conductive members includes a first fuse structure in series with a first bond pad portion. The bond pad portion forms an electrical contact with a corresponding integrated circuit device. A voltage is then applied to the device via the conductive member and the bond pad portion. The fuse structure is adapted to form an open between the conductive member and the bond pad portion if the current in the fuse exceeds a predetermined threshold. After the voltage has been applied and the testing completed, the patterned conductive layer is then removed from the semiconductor device prior to final assembly or packaging.
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Monin, Jr. Donald L.
Motorola Inc.
Pham Hoai
Rodriguez Robert A.
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