Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent
1986-07-09
1989-07-11
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Simultaneous operations
36523004, 365233, 365236, 340799, G11C 700, G11C 800
Patent
active
048478091
ABSTRACT:
An image memory comprising a plurality of memory cell columns for memorizing image data, common word lines for connecting memory cells of these memory cell columns, a scanner for sequentially designating memory cells of the column on the basis of a clock signal, a column address counter for counting the clock signal to output a column address signal, a write column selector responsive to the column address signal to select a memory cell column into which image data is written, a write buffer for writing image data into the designated memory cell of the memory cell column selected by the write column selector, a read column selector for selecting a memory cell column different from the memory cell column selected by the write column selector, and a read buffer for reading image data from the designated memory cells of the memory cell column selected by the read column selector. The image memory is capable of performing write and read operations at the same time. For performing refresh operation simultaneously with read/write operation, a read/write/refresh selector may be provided instead of a read/write selector provided in the column address counter. Further, for realizing write and read operation at the same time even when a write clock signal is different from a read clock signal, the memory cell columns may be divided into a plurality of memory cell column groups, e.g., odd and even memory cell groups.
REFERENCES:
patent: 4433394 (1984-02-01), Torii et al.
patent: 4513372 (1985-04-01), Ziegler et al.
Nikkei Electronics, Feb. 1985; pp. 219-239.
Gossage Glenn A.
Kabushiki Kaisha Toshiba
Popek Joseph A.
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