Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2008-06-03
2011-12-27
Wilczewski, Mary (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S687000, C438S737000, C257SE21581, C257SE21577, C257SE21585
Reexamination Certificate
active
08084352
ABSTRACT:
A high-density N-type diffusion layer116formed in a separation area115makes it possible to reduce a collector current flowing through a parasitic NPN transistor102. Thus, a normal CMOS process can be used to provide a driving circuit and a data line driver which make it possible to improve resistance to possible noise occurring between adjacent terminals, while controlling a chip size.
REFERENCES:
patent: 6509623 (2003-01-01), Zhao
patent: 7741228 (2010-06-01), Ueki et al.
patent: 2006/0088975 (2006-04-01), Ueda
patent: 2006-120988 (2006-05-01), None
Harada Takeshi
Shibata Jun'ichi
Ueki Akira
Panasonic Corporation
Steptoe & Johnson LLP
Thomas Toniae
Wilczewski Mary
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