System and method for providing error correction and...

Details System and method for providing error correction and... System and method for providing error correction and...

2007-08-13

2011-11-08

Rizk, Sam (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S752000, C714S701000

Reexamination Certificate

active

08055976

ABSTRACT:
A system and method for providing error correction and detection in a memory system. The memory system includes a plurality of memory devices, and error detection and correction logic. The error detection and correction logic includes instructions for generating an error correction code (ECC) word that includes bits from two more of the memory devices and from different memory device transfers.

REFERENCES:
patent: 5313464 (1994-05-01), Reiff
patent: 5513135 (1996-04-01), Dell et al.
patent: 6381685 (2002-04-01), Dell et al.
patent: 2006/0036826 (2006-02-01), Dell et al.

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