Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2008-10-21
2011-11-08
Crespo, Marcos D Pizarro (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S777000, C257SE23011, C438S667000
Reexamination Certificate
active
08053900
ABSTRACT:
An integrated circuit structure includes a semiconductor chip, which further includes a first surface; and a patterned bond pad exposed through the first surface. The patterned bond pad includes a plurality of portions electrically connected to each other, and at least one opening therein. The integrated circuit further includes a dielectric material filled into at least a portion of the at least one opening.
REFERENCES:
patent: 5786238 (1998-07-01), Pai et al.
patent: 6100475 (2000-08-01), Degani et al.
patent: 6531384 (2003-03-01), Kobayashi et al.
patent: 6838774 (2005-01-01), Patti
patent: 7042100 (2006-05-01), Yamamoto et al.
patent: 7265441 (2007-09-01), Reiss et al.
patent: 7323785 (2008-01-01), Uchiyama
patent: 2002/0003307 (2002-01-01), Suga
patent: 2002/0047218 (2002-04-01), Liu et al.
patent: 2002/0117756 (2002-08-01), Yamashita
patent: 2003/0062625 (2003-04-01), Anand
patent: 2004/0188696 (2004-09-01), Chen et al.
patent: 2005/0001326 (2005-01-01), Masuda
patent: 2005/0127529 (2005-06-01), Huang et al.
patent: 2006/0043535 (2006-03-01), Hiatt
patent: 2006/0076664 (2006-04-01), Chen et al.
patent: 2006/0202347 (2006-09-01), Egawa
patent: 2007/0057358 (2007-03-01), Satou et al.
patent: 2007/0126005 (2007-06-01), Baek et al.
patent: 2007/0166997 (2007-07-01), Knorr
patent: 2007/0170584 (2007-07-01), Chatterjee
patent: 2008/0006938 (2008-01-01), Patti et al.
patent: 2008/0258309 (2008-10-01), Chiou et al.
patent: 2009/0160050 (2009-06-01), Miyakawa et al.
Liu, C.C., et al., “Mapping System-on-Chip Designs from 2-D to 3-D ICs,” Circuit and Systems, IEEE 2005, vol. 3, May 23-26, 2005, pp. 2939-2942.
Chiou Wen-Chih
Wu Weng-Jin
Yu Chen-Hua
Crespo Marcos D Pizarro
Munoz Andres
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
LandOfFree
Through-substrate vias (TSVs) electrically connected to a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Through-substrate vias (TSVs) electrically connected to a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Through-substrate vias (TSVs) electrically connected to a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4272168