Translation table coherency mecahanism using cache way and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S103000, C711S118000, C711S202000, C711S206000

Reexamination Certificate

active

08041895

ABSTRACT:
Systems and/or methods are presented that provide for recording transactions that occur during a write process for the purpose of recovering the transactions in the event of a power loss. In an aspect a system implements an organization that reflects a cache architecture that is organized according to the cache way and set index of each transaction In this regard, the cache way and set index cache architecture provides for a post-power loss search operation that is limited to identifying duplicate locations within the cache-line and keeping only the most recent modification. Thus the system provides pre-organization in terms of self-aggregation by cache way and set index recording that facilitates cache-line eviction processing in the event that the cache is determined to be full.

REFERENCES:
patent: 7761740 (2010-07-01), Kern et al.

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