Non-volatile memory device

Details Non-volatile memory device Non-volatile memory device

Filed on

2009-06-23

Date issued

2011-10-25

Examiner

Bryant, Kiesha (Department: 2891)

Patent Class

Active solid-state devices (e.g., transistors, solid-state diode

SubClass

Field effect device

SubSubClass

Having insulated electrode

Other Related Categories

C257SE29309, C257S314000, C257SE29300

Type

Reexamination Certificate

Status

active

Patent number

08044454

Description

ABSTRACT:
A non-volatile memory device having a SONOS structure and a manufacturing method thereof, where a conductive layer is formed between a charge trap layer and a blocking insulation layer of the SONOS structure. Therefore, when a voltage is applied to a gate, the conductive layer undergoes voltage distributions. Accordingly, a desired voltage can be applied to the blocking insulation layer, the charge trap layer and the tunnel insulating layer by controlling the effective oxide thickness (EOT) of the blocking insulation layer and the EOT of the charge trap layer and the tunnel insulating layer. It is therefore possible to improve the erase speed of a cell.

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