Thin film transistor substrate and fabricating method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

Reexamination Certificate

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Details

C257SE21411, C257SE29275, C438S151000

Reexamination Certificate

active

07821040

ABSTRACT:
A thin film transistor substrate and fabricating method thereof by which the size of the thin film transistor substrate is reduced by constructing data signal supply lines, each of which supplies a pixel data voltage to a data line, with different metal lines, respectively includes gate and data lines crossing each other on a substrate, with a gate insulating layer disposed therebetween, a thin film transistor formed on each intersection between the gate and data lines, a display area on which a pixel electrode connected to the thin film transistor is formed, a first data signal supply line comprising a first conductive layer connected to the data line in a non-display area located at a periphery of the display area, and a second data signal supply line alternating with the first data signal supply line, with the gate insulating layer disposed therebetween, the second data signal supply line comprising a second conductive layer connected to the data line.

REFERENCES:
patent: 7352426 (2008-04-01), Abe et al.
patent: 7545474 (2009-06-01), Yang et al.
patent: 2002/0071086 (2002-06-01), Kim et al.
patent: 2004/0051836 (2004-03-01), Jung et al.
patent: 2006-209089 (2006-08-01), None
patent: 0403940 (1996-10-01), None
patent: 2005-086699 (2005-08-01), None

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