Thin film transistor array panel and manufacture thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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Details

C257S025000, C257S040000, C257S049000, C257S059000, C257S066000

Reexamination Certificate

active

07737448

ABSTRACT:
A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.

REFERENCES:
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patent: 2004/0104461 (2004-06-01), Ishihara et al.
patent: 2004/0183977 (2004-09-01), Kitagawa et al.
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patent: 1020060061912 (2006-06-01), None
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English Language Abstract WO 2004021447, Mar. 11, 2004, corresponding to KR 10-2005-0059154, Jun. 17, 2005.
English Language Abstract KR 1020060097144, Sep. 14, 2006, corresponding to KR 10-0649189, Nov. 16, 2006.

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