Wafer level package with die receiving through-hole and...

Details Wafer level package with die receiving through-hole and... Wafer level package with die receiving through-hole and...

2007-01-03

2010-10-12

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With semiconductor element forming part

C257S700000, C257S690000

Reexamination Certificate

active

07812434

ABSTRACT:
The present invention discloses a structure of package comprising: a substrate with a die receiving through hole; a base attached on a lower surface of the substrate; a die disposed within the die receiving through hole and attached on the base; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the die; a protection layer formed over the RDL; and pluralities of pads formed on the protection layer and coupled to the RDL. The RDL is made from an alloy comprising Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.

REFERENCES:
patent: 6127634 (2000-10-01), Higashiguchi et al.
patent: 6952049 (2005-10-01), Ogawa et al.
patent: 7459729 (2008-12-01), Yang et al.
patent: 2008/0083980 (2008-04-01), Yang et al.
patent: 2008/0116564 (2008-05-01), Yang et al.
patent: 2008/0136002 (2008-06-01), Yang
patent: 2008/0157341 (2008-07-01), Yang et al.

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