Memory cell and method of programming the same

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185030

Reexamination Certificate

active

07738300

ABSTRACT:
A method of programming a memory cell is described. The memory cell includes a gate with a charge trapping layer isolated from a substrate for storing data with a first region and a second region separated from the first region. The method of programming the memory cell includes applying a first voltage arrangement with a first gate voltage for programming the first region and applying a second voltage arrangement with a second gate voltage for programming the second region. The first gate voltage is greater than the second gate voltage.

REFERENCES:
patent: 6215702 (2001-04-01), Derhacobian et al.
patent: 6608778 (2003-08-01), Liu et al.

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