Semiconductor memory device and system providing spare...

Details Semiconductor memory device and system providing spare... Semiconductor memory device and system providing spare...

2007-04-25

2010-02-02

Le, Vu A (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S185090

Reexamination Certificate

active

07656727

ABSTRACT:
A semiconductor memory device having a plurality of memory locations is presented. The plurality of memory locations includes a plurality of primary memory locations and a plurality of spare memory locations. The device includes an address decoder configured to receive a memory location address and process the address to select one of the memory locations. The device further includes control logic configured to receive control signals and process the control signals to determine whether the selected one of the memory locations is one of the primary memory locations or one of the spare memory locations, and to provide access to the selected one of the memory locations via data lines.

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