Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2007-07-31
2010-06-22
Smith, Zandra (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S784000, C257SE23141, C257SE23147, C257SE23149, C257SE21592
Reexamination Certificate
active
07741721
ABSTRACT:
Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator layer. Self-assembling block copolymers are applied into the recessed area and annealed to form a first set of polymer blocks and a second set of polymer blocks. The first set of polymer blocks are etched selective to the second set and the at least one insulator layer. Features having sublithographic dimensions are formed in the at least one insulator layer and/or the conductive structure. Various semiconductor structures having sublithographic dimensions are formed including electrical fuses and resistors.
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patent: 2006/0175667 (2006-08-01), Tsuchiaki
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Yang, Haining et al., “Sub-Lithographic Feature Patterning Using Self-Aligned Self-Assembly Polymers”, U.S. Appl. No. 11/424,963, filed Jun. 19, 2006.
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Black Charles T.
Colburn Matthew E.
Dalton Timothy J.
Edelstein Daniel C.
Li Wai-Kin
Abate Esq. Joseph P.
Chiu Tsz K
International Business Machines - Corporation
Scully , Scott, Murphy & Presser, P.C.
Smith Zandra
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